S/Gi-LAN Service Chaining

Service Chaining the S/Gi-LAN with High Speed Packet Processing

So just where in the network is some of the most expensive equipment deployed? For now it appears that one place is in the S/Gi-LAN. As such, the opportunity for MNOs to consolidate fixed function hardware onto a single open architecture x86 platform and apply open-standard packet acceleration technology to meet DPI needs, promises high return on flexibility, CAPEX and OPEX.

 

The Gi-LAN interface, a 3GPP reference point that denotes the part of the network between the mobile packet core and the packet data network (PDN) or internet, has always been the domain of some of the most demanding packet processing workloads. In LTE Networks the interface is referred to as the SGi-LAN and connects the Packet Gateway (P-GW) in the mobile core network to the PDN.

All mobile subscribers access their network services through the S/Gi-LAN, as mobile network operators (MNOs) classify traffic from millions of flows at any one time, directing them when necessary to specific network services in order to meet policy enforcement and specific service level agreement needs.

 

The S/GI-LAN data plane is where the bulk of the packetized mobile networking traffic is processed. As such, the use of frameworks like the Data Plane Developer Kit (DPDK) ensures that networking infrastructure elements deployed there are fast, flexible, and open through a set of libraries and drivers that accelerate data plane performance on general purpose processors by an order of magnitude when compared with other prominent software architectures.

In fact high-performance packet processing is available across the entire range of Intel® Xeon® processors, which excel when coupled with high throughput Ethernet NICs and their virtual acceleration features. DPDK enables CPU cores to process packets continuously, unimpeded by the operating system, other applications, or interrupts. This greatly increases system performance and determinism in applications leveraging NFV.

Advantech has been supplying high performance networking platforms to Network Equipment Providers (NEPs) for high-end packet processing on Intel Architecture leveraging Intel DPDK and Intel Hyperscan technologies for many DPI and content inspection use cases. With the advent of NFV, MNOs can leverage these platforms to transform their network architecture and to consolidate multiple functions onto a single platform.

One such platform which recently introduced by Advantech is the FWA-6170, a high-end network appliance ideally suited for service function chaining in software defined networks in both data centers and telecommunications networks. The FWA-6170, is a powerful and flexible 2U platform that delivers up to wire speed IP packet classification using two Intel® Xeon® Platinum Processors with up to 28 cores each. Its new security features and augmented platform modularity, enables equipment and service providers to build faster, more secure networks, bringing greater cost-efficiency to applications in the S/Gi-LAN while leaving sufficient overhead to anticipate future infrastructure changes.

To discover more, read the Advantech white paper which discusses the state of the Gi-LAN, the migration to Network Function Virtualization and the underlying NFV Infrastucture (NFVI) that will allow improved capital efficiencies compared with dedicated or proprietary hardware implementations.

 

Paul Stevens – Telecom Sector Marketing Director

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